Multiplexers


The interest of any circuit designer is to have the following three things:
1. He wants the fastest circuit possible.
2. He wants the circuit to consume the least area.
3. He wants the circuit to consume as less power as possible.

As we know Nature has its own ways, It always tries to do the opposite of what humans try to do. The greatest challenge of mankind is to win over nature.

As a law to make a circuit or any process (for that matter) fast we must carry out many processes parallely (simultaneously).
As an analogy more the number of people working on together on a certain work the faster it gets completed.
Here also more the hardware or more the number of wires between the circuits the faster the circuit works.

Now if we increase the number of wires the area of the whole circuit increases. This is very important for small circuits or highly integrated circuits like microprocessors and microcontrollers.
Now if we plot timing versus area curve it is as shown below:



WHY DO WE NEED A MUX??
It is clear that we can’t use so many wires or so much hardware everywhere. Imagine 40 telephone lines between each home.
This is not possible so we send data in serial or one by one or bit by bit.
Now wouldn’t it be wonderful to control many lines by a lesser number of lines: YES it would be.
Now one such circuit is a MULTIPLEXER or shortly known as a MUX.

WHAT IS A MUX??
A MUX is a circuit which has one output, n Select lines and 2n data input lines.

Let us see what each does in detail:
2n data input lines: These are the inputs to the MUX. They are commonly referred to as data lines as in a microprocessor these are generally the data lines.

n Select lines: These are the pins which select which input is to be routed to the output.

Output: This is the output line.

To sum up the n select lines select any one of 2n data lines and route it to the single output line.

HOW 2 POWER N INPUTS AND ONLY N SELECT LINES??
As we know that when we write 3 digit decimal numbers there are 1000 numbers (000 to 999) or 103. So we can say that for a radix N data format with k no. of bits we can represent Nk distinct numbers. In the language of electronics we refer to as Nk distinct states can be represented by k no. of bits of a data format with radix N.
In binary N = 2. Hence we can represent 2N distinct states.
Hence if there are N select lines we can select 2N distinct states or data line so called here.

HOW DO I BUILD A MUX??
Now enough of theory lets get practical.
To build any digital circuit we must first represent it as a TRUTH TABLE.
So let’s write the truth table for a MUX with 1 select line, 21 = 2 data lines and one output line.
Let us call the select line S, Data lines D0 and D1 and output line as Y.

TRUTH TABLE:
S          D1       D0       Y
0          0          0          0
0          0          1          1
0          1          0          0
0          1          1          1

1          0          0          0         
1          0          1          0         
1          1          0          1
1          1          1          1

We electronics engineers never write a truth table so big. Let us try to make the truth table smaller.
It is clear form the truth table that the output Y follows D0 of select line S is 0 irrespective of D1.
It is also clear form the truth table that the output Y follows D1 of select line S is 1 irrespective of D0.

Engineer’s version of the truth table is as follows:

S          Y
0          D0
1          D1

Now we have the truth table. Let us derive the output equation. To write the output equation if S is zero complement it, if it is 1 keep it as it is and multiply with the respective outputs and keep adding all the terms to get the final output.

If you didn’t get it just put it like this:

Y = Sbar(D0) + S(D1)

As we know a multiplication or logical multiplication in electronics s equivalent to an AND gate in electronics. Similarly an addition or logic addition is equivalent to an OR gate and complement is equivalent to a NOT gate.

So in the language of gates:

Y  = [NOT(S)AND(D0)]OR[(S)AND(D1)]

The circuit is as shown below:

We refer to a MUX with n select lines, 2n data lines and 1 output line as
an 2 power n : 1 MUX.
Hence the above circuit shown is a 2:1 MUX.

HOW TO REPRESENT A MUX??
An 2N:1 MUX is represented as shown below:


HOW DO I IMPLEMENT MUXes WITH MORE DATA LINES??
One simple method is writing the truth table like the one shown above and then implementing the circuit. It is left as an exercise to be done by the reader.

Next way is to use the MUX we already constructed to implement higher order MUXes. Now let us construct a 4:1 MUX using a 2:1 MUX.

How do I start??
See the number of data lines required: Here it is 4.
See the number of data lines we have in 1 MUX: Here it is 2.
So by simple mathematics it is clear that we need 2 2:1 MUXes.
If we use only 2:1 MUXes we get 2 outputs, but we need only one, so let us put these 2 outputs to the data lines of another 2:1 MUX so as to select the appropriate data line. What a clever idea I may say. Still didn’t get it?? To simplify things here is the circuit…Analyse it yourself.

 HOPE YOU ENJOYED READING THIS ARTICLE AS MUCH AS I DID WRITING IT....ENJOY:):):):)

ARTICLE BY:
NITIN