Let us consider an analogy that a mentor has to mentor several people. He can’t mentor everyone at the same time so he allots a particular slice of time for each person, in a similar fashion if we have a single input signal which is to be routed to different circuitry at different instants of time we use a DEMULTIPLEXER.
WHY DO WE NEED A DEMULTIPLEXER??
After we have multiplexed a signal, we need to demultiplex it. It is done using a demultiplexer. In effect what a demultiplexer does is that, it takes the data input and routes it to any one of several possible outputs. These outputs may in turn control other areas in a big circuit.
WHAT IS A DEMULTIPLEXER OR DEMUX??
It is a digital circuit which has 1 data input line (Recall that MUX had 1 output line), n Select lines and 2n output lines (Recall that MUX had 2n input lines).
Let us see what each line does in a bit more detail:
1 Data input line: Here the data input which is to be routed any one of the output line is fed.
n Select Lines: These select the desired output line on which the routed data is available.
2n Output lines: These are the output lines on which the routed data is available.
To sum up the n select lines select any one of 2n output lines and the data from the single data input line is available on this line.
HOW DO I BUILD A DEMUX??
To build a DEMUX is fairly simple as the case with the MUX.
First lets write the truth table with 1 select line, 21 = 2 output lines and 1 data input line.
Let us call this DEMUX as 1:2 DEMUX.
Let us denote the data input line as D, output lines as Y0 and Y1 and select line as S.
TRUTH TABLE:
D S Y1 Y0
0 0 0 0
1 0 0 1
0 1 0 0
1 1 1 0
To simplify the above truth table, Let us analyse it a little bit. We can clearly see that the output Y0 follows the data input D if S = 0 and Y1 = 0. Similarly, output Y1 follows the data input D if S = 1 and Y0 = 0.
The concise version of the truth table is as follows:
S Y1 Y0
0 0 D
1 D 0
Deriving the output equation from the truth table we get:
Y1 = S(D),
Y0 = Sbar(D)
In the language if gates we have:
Y1 = (S)AND(D),
Y0 = NOT(S)AND(D)
The circuit is shown below:
HOW DO I REPRESENT A DEMUX??
A DEMUX with 1 data input , n Select lines and 2n output lines is represented as shown below:
HOPE YOU ENJOYED READING THIS ARTICLE AS MUCH AS I DID WRITING IT....ENJOY:):):):)
ARTICLE BY:
NITIN